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features ? dual marked with device part number and dscc standard microcircuit drawing ? manu ? actured and ? e? ted on a m ???p???????? certi ? manu ? actured and ? e? ted on a m ???p???????? certi ? fed ?ine ? ? m ???????? cla?? ? and ? ?m ???????? cla?? ? and ? ? ? our ?ermeticall ? sealed package confguration ? ? our ? ermeticall? sealed package confguration? ? per ? ormance ? uaranteed over ???? c to ?????c per ? ormance ? uaranteed over ????c to ?????c ? ? ide ? ? ide ? cc ? ange (?.? to ?0 ? ) ? ?? 0 n? ma ? imum pro? agation dela? ??0 n? ma?imum pro? agation dela ? ? cm ?? ? ?0?000 ???? ? ??ical cm?? ? ?0?000 ???? ???ical ? ?? 00 ? dc ? ith?tand ? e?t ? oltage ??00 ? dc ? ith?tand ? e?t ? oltage ? ? hree state ? ut?ut ? vailable ? hree state ? ut?ut ? vailable ? ?igh ? adiation ? mmunit? ? igh ? adiation ? mmunit ? ? ?cp ????00??? ? unction com ? atibilit? ?cp ????00??? ? unction com? atibilit ? ? ? eliabilit ? data ? vailable ? eliabilit ? data ? vailable ? com ? atible with ?s ???? ???? and cm ?s ? ogic com ? atible with ?s ???? ???? and cm?s ? ogic applications ? militar ? and s? ace ? ? igh ? eliabilit ? s ?? tem ? ? ? ran ?? ortation and ?i? e critical s ?? tem ? ? ? igh s?eed ?ine ? eceiver ? ?? olated bu? driver (single channel) ? pul ?e ? ran ?? ormer ? e? lacement ? ? round ? oo? elimination ? ?ar?h ? ndu? trial environment? ? com ? uter ? peri? heral ? nter ? ace? description ? he?e unit? are ? ingle ? dual and quad channel ? hermeti ? call ? ?ealed o? tocou?ler? . ? he ? roduct? are ca?able o? o? eration and ? torage over the ?ull militar ? tem? erature range and can be ? urcha?ed a? either ? tandard ? roduct or with ?ull m ???p???????? cla ?? ? evel ? or ? te ?ting or ? rom the a?? ro? riate dscc drawing. ? ll device ? are manu? actured and te ? ted on a m ???p???????? certifed line and are included in the dscc ? ualifed manu ? actur ? er? ?i?t ?m ??????? ? or ?? brid microcircuit? . each channel contain ? an ? l? a ?? light emitting diode which i? o?ticall? cou ?led to an integrated high gain ? hoton detector. ? he detector ha? a thre ?hold with h ?? ? tere ? i ? which ? rovide ? diferential mode noi ? e immunit ? and eliminate ? the ? otential ? or out?ut ? ignal chatter. ? he detector in the ?ingle channel unit? ha? a tri ?? tate out?ut ?tage which allow ? ? or direct connection to data bu?e? . ? he out?ut i? noninverting. ? he detector ? c ha? an internal ? hield that ? rovide ? a guaranteed common mode tran ? ient immunit ? o ? u ? to ? 0 ? 000 ???? . ? m ? roved ? ower ?u??l? rejection eliminate ? the need ? or ??ecial ? ower ?u??l? b ??a?? ? recaution? . note ? ? 0.? m ? b ??a?? ca? acitor mu?t be connected between ? cc and ?nd ?in? . hcpl-520x, hcpl-523x, hcpl-623x, hcpl-625x, 5962-88768 and 5962-88769 hermetically sealed low if, wide vcc, logic gate optocouplers data sheet caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd.
package ? t ? le ? ? or the ? e ? art ? are ? ? in d ? p through hole (ca?e outline p) ? ?6 ?in d?p fat ? ack (ca?e outline ?)? and leadle ?? ceramic chi ? carrier (ca ? e outline ? ). device ? ma ? be ? urcha?ed with a variet ? o? lead bend and ? lating o?tion ?? ?ee selection ? uide ? able ? or detail? . standard microcircuit drawing (smd) ? art ? are available ? or each ? ackage and lead ?t ? le. becau ?e the ?ame electrical die (emitter ? and detector ?) are u?ed ? or each channel o? each device li? ted in thi? data ? heet ? ab? olute ma?imum rating ?? recommended o ? erating condition ?? electrical ?? ecifcation ?? and ? er ? or ? mance characteri ?tic ? ? hown in the fgure ? are identical ? or all ? art? . ? cca ?ional e ? ce ?tion? e ?i?t due to ? ackage variation ? and limitation? and are a? noted. ? dditionall ?? the ? ame ? ackage a ?? embl ? ? roce ?? e ? and material ? are u ? ed in all device ? . ? he ? e ? imilaritie ? give ju ? tifcation ? or the u ? e o ? data obtained ? rom one ? art to re ? re ? ent other ? art ? ? er ? ormance ? or die related reliabilit ? and certain limited radiation te?t re?ult? . truth tables (po ? itive ? ogic) functional diagram multi ?le channel device? ? vailable multichannel devices input output on (h) h of (l) l single channel devices input enable output on (h) h z of (l) h z on (h) l h of (l) l l v cc v o v e gnd 8 pin dip 8 pin dip 16 pin flat pack 20 pad lccc through hole through hole unformed leads surface mount 1 channel 2 channels 4 channels 2 channels functional diagrams v cc 7 5 6 8 v o v e gnd 1 2 3 4 5 7 6 8 12 10 11 9 gnd v o4 v o3 1 3 2 4 16 14 15 13 v cc v o2 v o1 gnd 1 v o2 19 20 2 3 v o1 8 7 v cc2 v cc1 10 gnd 2 15 13 12 v cc 7 5 6 8 v o1 gnd 1 2 3 4 v o2 note ? multichannel d?p and fat ?ack device? have common ? cc and ground. single channel d?p ha? an enable ?in 6. ? ccc (leadle?? ceramic chi? carrier) ? ackage ha? i? olated channel? with ?e? arate ? cc and ground connection? .
selection guideCpackage styles and lead confguration options package 8 pin dip 8 pin dip 16 pin flat pack 20 pad lccc lead style through hole through hole unformed leads surface mount channels 1 2 4 2 common channel wiring none v cc gnd v cc gnd none avago technologies part numbers and options commercial hcpl-5200 hcpl-5230 hcpl-6250 hcpl-6230 mil-prf-38534 class h hcpl-5201 hcpl-5231 hcpl-6251 hcpl-6231 mil-prf-38534 class k hcpl-520k hcpl-523k hcpl-625k hcpl-623k standard lead finish gold plate gold plate gold plate solder pads * solder dipped* option 200 option 200 butt joint/gold plate option 100 option 100 gull wing/soldered* option 300 option 300 class h smd part number prescript for all below 5962- 5962- 5962- 5962- either gold or soldered 8876801px 8876901px 8876903fx 88769022x gold plate 8876801pc 8876901pc 8876903fc solder dipped* 8876801pa 8876901pa 88769022a butt joint/gold plate 8876801yc 8876901yc butt joint/soldered* 8876801ya 8876901ya gull wing/soldered* 8876801xa 8876901xa class k smd part number prescript for all below 5962- 5962- 5962- 5962- either gold or soldered 8876802kpx 8876904kpx 8876906kfx 8876905k2x gold plate 8876802kpc 8876904kpc 8876906kfc solder dipped* 8876802kpa 8876904kpa 8876905k2a butt joint/gold plate 8876802kyc 8876904kyc butt joint/soldered* 8876802kya 8876904kya gull wing/soldered* 8876802kxa 8876904kxa * solder contain? lead
outline drawings 8 pin dip through hole, 1 and 2 channel 8.13 (0.320) max. 5.23 (0.206) max. 2.29 (0.090) max. 7.24 (0.285) 6.99 (0.275) 1.27 (0.050) ref. 0.46 (0.018) 0.36 (0.014) 11.13 (0.438) 10.72 (0.422) 2.85 (0.112) max. 0.89 (0.035) 0.69 (0.027) 0.31 (0.012) 0.23 (0.009) 0.88 (0.0345) min. 9.02 (0.355) 8.76 (0.345) note: dimensions in millimeters (inches). 3.81 (0.150) min. 4.32 (0.170) max. 9.40 (0.370) 9.91 (0.390) 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 0.76 (0.030) 1.27 (0.050) 8.13 (0.320) max. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) 7.16 (0.282) 7.57 (0.298) note: dimensions in millimeters (inches). 16 pin flat pack, 4 channels
20 terminal lccc surface mount, 2 channels 8.70 (0.342) 9.10 (0.358) 4.95 (0.195) 5.21 (0.205) 1.78 (0.070) 2.03 (0.080) 1.02 (0.040) (3 plcs) 4.95 (0.195) 5.21 (0.205) 8.70 (0.342) 9.10 (0.358) 1.78 (0.070) 2.03 (0.080) 0.51 (0.020) 0.64 (0.025) (20 plcs) 1.52 (0.060) 2.03 (0.080) metalized castillations (20 plcs) 2.16 (0.085) terminal 1 identifier note: dimensions in millimeters (inches). solder thickness 0.127 (0.005) max. 1.14 (0.045) 1.40 (0.055) leaded device marking leadless device marking *qualified parts only compliance indicator,* date code, suffix (if needed) a qyywwz xxxxxx xxxxxxx xxx xxx 50434 country of mfr. avago fscn* dscc smd* pin one/ esd ident avago p/n dscc smd* avago designator *qualified parts only compliance indicator,* date code, suffix (if needed) a qyywwz xxxxxx xxxx xxxxxx xxx 50434 dscc smd* avago fscn* avago designator country of mfr. avago p/n pin one/ esd ident dscc smd*
hermetic optocoupler options option description 100 surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. this option is available on commercial and hi-rel product in 8 pin dip (see drawings below for details). 200 lead fnish is solder dipped rather than gold plated. this option is available on commercial and hi-rel product in 8 pin dip. dscc drawing part numbers contain provisions for lead fnish. all leadless chip carrier devices are delivered with solder dipped terminals as a standard feature. 300 surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. this option is available on commercial and hi-rel product in 8 pin dip (see drawings below for details). this option has solder dipped leads. 1.14 (0.045) 1.40 (0.055) 4.32 (0.170) max. 0.51 (0.020) max. 2.29 (0.090) 2.79 (0.110) 0.51 (0.020) min. 7.36 (0.290) 7.87 (0.310) 0.20 (0.008) 0.33 (0.013) note: dimensions in millimeters (inches). 0.20 (0.008) 0.33 (0.013) 0.51 (0.020) min. 4.57 (0.180) max. 0.51 (0.020) max . 2.29 (0.090) 2.79 (0.110) 1.40 (0.055) 1.65 (0.065) 9.65 (0.380) 9.91 (0.390) 5? max . 4.57 (0.180) max. note: dimensions in millimeters (inches). note: solder contain? lead
absolute maximum ratings recommended operating conditions esd classifcation 8 pin ceramic dip single channel schematic parameter symbol min. max. units storage ? em? erature ? ange ? s ?6?? ???0? c ?? erating ? mbient ? em? erature ? ? ???? ????? c junction ? em? erature ? j ??7?? c ca ?e ? em? erature ? c ??70? c ? ead solder ? em? erature (?.6 mm below ? eating ?lane) ?60? ? or ?0 ? c ? verage ? orward current ? each channel ? ? ??? ? m? peak ? n?ut current ? each channel ? ?p? ?0 [?] m? ? ever ?e ? n?ut ? oltage ? each channel ? ? ? ? ? verage ? ut?ut current ? each channel ? ? ?? m? su??l ? ? oltage ? cc 0.0 ?0 ? ? ut?ut ? oltage ? each channel ? ? ?0.? ?0 ? package power di??i? ation? each channel p d ?00 m? single channel product only ? ri ? state enable ? oltage ? e ?0.? ?0 ? (mil-std-883, method 3015) ?cp ????00?0??0? and ?cp ??6??0?????? ( d )? cla?? ? ?cp ?????0?????? and ?cp ??6??0?????? (dot) ? cla?? ? parameter symbol min. max. units power su??l ? ? oltage ? cc ?.? ?0 ? ? n?ut current ? ? igh ? evel ? each channel ? ?? ? ? m? ? n?ut ? oltage ? ? ow ? evel ? each channel ? ?? 0 0.? ? ? an ? ut ( ??? ? oad)? each channel n ? single channel product only ? igh ? evel enable ? oltage ? e? ?.0 ?0 ? ? ow ? evel enable ? oltage ? e? 0 0.? ? note enable ?in 6. ? n e ? ternal 0.0? ?? to 0.? ?? b ??a?? ca? acitor i? recommended between ? cc and ground ? or each ? ackage t ?? e.
electrical characteristics ? ? = ????c to ?????c? ?. ? ? ? cc ?0 ?? ? m? ? ?( ?n) ? m?? 0 ? ? ?( ???) 0. ? ?? unle?? otherwi?e ?? ecifed. parameter symbol group a, sub-groups [11] test conditions limits units fig. notes min. typ.* max. ? ogic ? ow ? ut?ut ? oltage ? ?? ?? ?? ? ? ?? = 6.? m? ( ? ??? ? oad?) 0.? ? ?? ? ? ? ogic ? igh ? ut?ut ? oltage ? ?? ?? ?? ? ? ?? = ??.6 m?? (**? ?? = ? cc ? ?. ? ? ) ?.? ** ? ?? ? ? n? ? ?? = ?0.?? m? ?.? ? ut?ut ? eakage current ( ? ?u? ? ? cc ) ? ??? ?? ?? ? ? ? = ?. ? ? ? ? = ? m? ? cc = ?. ? ? ?00 m ? ? ? ? = ?0 ? ?00 ? ogic ? ow su??l? current single channel ? cc ? ?? ?? ? ? cc = ?. ? ? ? ? = 0 ? ? e = dont care ?.? 6 m? ? cc = ?0 ? ?.? 7.? dual channel ? cc = ?. ? ? ? ?? = ? ?? = 0 ? 9.0 ?? ? cc = ?0 ? ?0.6 ?? ? uad channel ? cc = ?. ? ? ? ?? = ? ?? = ? ?? = ? ?? =0 ? ?? ?? ? cc = ?0 ? ?7 ?0 ? ogic ? igh su??l? current single channel ? cc ? ?? ?? ? ? cc = ?. ? ? ? ? = ?m? ? e = dont care ?.9 ?.? m? ? cc = ?0 ? ?.? 6 dual channel ? cc = ?. ? ? ? ?? = ? ?? = ?m? ?.? 9 ? cc = ?0 ? 6.6 ?? ? uad channel ? cc = ?. ? ? ? ?? = ? ?? = ? ?? = ? ?? = ?m? 9 ?? ? cc = ?0 ? ?? ?? ? ogic ? ow short circuit ? ut?ut current ? ?s? ?? ?? ? ? ? = ? cc = ?. ? ? ? ? = 0 ? ?0 m? ?? ? ? ? = ? cc = ?0 ? ?? ? ogic ? igh short circuit ? ut?ut current ? ?s? ?? ?? ? ? cc = ?.?? ? ? = ? m? ? ? = ?nd ??0 m? ?? ? ? cc = ?0 ? ??? ? n?ut ? orward ? oltage ? ? ?? ?? ? ? ? = ? m? ?.0 ?.? ?.? ? ? ? ? n?ut ? ever ?e breakdown ? oltage b ? ? ?? ?? ? ? ? = ?0 m ? ? ? ? ? n?ut ?? ut?ut ? n? ulation ? eakage current ? ??? ? ? ??? = ??00 ? dc ? t = ??? ?? 6?% ? ? ? = ???c ?.0 m ? ?? ? ? ogic ? igh common mode ? ran ? ient ? mmunit ? |cm ? | 9? ?0? ?? ? ? = ? m ?? ? cm = ?0 ? p ?p ?000 ?0?000 ?? m ? 9 ?? 6? ?? ? ogic ? ow common mode ? ran ? ient ? mmunit ? |cm ? | 9? ?0? ?? ? ? = 0 m ?? ? cm = ?0 ? p ?p ?000 ?0?000 ?? m ? 9 ?? 6? ?? pro ? agation dela ? ? ime to ? ogic ? ow t p?? 9? ?0? ?? ?7? ??0 n? ?? 6 ?? 7 pro ? agation dela ? ? ime to ? ogic ? igh t p?? 9? ?0? ?? ??? ??0 n? ?? 6 ?? 7
electrical characteristics - single channel product only ? ? = ???? c to ????? c ? ? . ? ? ? cc ? 0 ?? ? m ? ? ? ( ? n) ? m ?? 0 ? ? ? ( ??? ) 0. ? ?? ? .0 ? ? e ? ? 0 ?? 0 ? ? e ? 0. ? ?? unle?? otherwi?e ?? ecifed. *? ll t ??ical value? are at ? cc = ? ?? ? ? = ???c? ? ?( ?n) = ? m? unle?? otherwi?e ?? ecifed. parameter symbol group a, sub-groups [11] test conditions limits units fig. notes min. typ.* max. ? igh ? m? edance state ? ut?ut current ? ?z? ????? ? ? = 0. ? ? ? en = ? ?? ? ? = 0 ? ??0 m ? ? ?z? ????? ? ? = ?. ? ? ? en = ? ?? ? ? = ? m? ?0 m ? ? ? = ?. ? ? ?00 ? ? = ?0 ? ?00 ? ogic ? igh enable ? oltage ? e? ?? ?? ? ?.0 ? ? ogic ? ow enable ? oltage ? e? ?? ?? ? 0.? ? ? ogic ? igh enable current ? e? ?? ?? ? ? en = ?.7 ? ?0 m ? ? en = ?. ? ? ?00 ? en = ?0 ? 0.00? ??0 ? ogic ? ow enable current ? e? ?? ?? ? ? en = 0. ? ? ?0.?? m?
10 note ?? ? . peak ? orward ? n?ut current ?ul?e width < ?0 ?? at ? ?? z ma?imum re?etition rate. ? . each channel o? a multichannel device. ? . duration o? out?ut ? hort circuit time not to e ? ceed ?0 m? . ?. ? ll device? are con? idered two ? terminal device?? mea? ured between all in?ut lead? or terminal? ? horted together and all out?ut lead? or ter ? minal? ? horted together. ?. ? hi? i? a momentar ? with?tand te?t ? not an o? erating condition. 6. cm ? i? the ma?imum rate o? ri?e o? the common mode voltage that can be ?u?tained with the out?ut voltage in the logic low ? tate ( ? ? < 0.? ? ). cm ? i? the ma?imum rate o? ?all o? the common mode voltage that can be ?u?tained with the out?ut voltage in the logic high ? tate ( ? ? ? ?.0 ? ). 7. t p?? ? ro? agation dela ? i? mea? ured ? rom the ?0% ? oint on the leading edge o? the in?ut ?ul?e to the ?. ? ? ? oint on the leading edge o? the out?ut ?ul? e. ? he t p?? ? ro? agation dela ? i? mea? ured ? rom the ?0% ? oint on the trailing edge o? the in?ut ?ul?e to the ?. ? ? ? oint on the trailing edge o? the out?ut ?ul? e. ? . mea? ured between each in?ut ?air ? horted together and all out?ut connection? ? or that channel ? horted together. 9. mea ? ured between adjacent in?ut ?air? ? horted together ? or each multichannel device. ? 0. zero ?bia? ca? acitance mea? ured between the ?ed anode and cathode. ?? . standard ? art? receive ?00% te?ting at ???c (subgrou?? ? and 9). smd ? cla?? ? and cla?? ? ? art? receive ?00% te?ting at ??? ???? and C???c (subgrou ?? ? and 9? ? and ?0? ? and ??? re?? ectivel?). ?? . parameter? are te? ted a? ? art o? device initial characterization and a? ter de? ign and ? roce?? change? . parameter? guaranteed to limit? ??eci ? fed ? or all lot? not ??ecifcall? te? ted. typical characteristics ? ll t ??ical value? are at ? ? = ???c ? ? cc = ? ?? ? ?( ?n) = ? m? unle?? otherwi?e ?? ecifed. parameter symbol test conditions typ. units fig. notes ? n?ut current ??? tere?i? ? ? ys ? cc = ? ? 0.07 m? ? ? ? n?ut diode ? em? erature coefcient d ? ? d ? ? ? ? = ? m? ??.?? m???c ? ? e?i? tance (? n?ut ?? ut?ut) ? ??? ? ??? = ?00 ? dc ?0 ?? w ?? ? ca ? acitance (? n?ut ?? ut?ut) c ??? ? = ? m? z ?.0 ?? ?? ? ? n?ut ca? acitance c ?n ? ? = 0 ?? ? = ? m? z ?0 ?? ?? ?0 ? ut?ut ? i?e ? ime (?0?90%) t r ?? n? ?? 7 ? ? ut?ut ? all ? ime (90??0%) t ? ?0 n? ?? 7 ? single channel product only ? ut?ut enable ? ime to ? ogic ? igh t pz ? ?0 n? ? ? ut?ut enable ? ime to ? ogic ? ow t pz ? ?0 n? ? ? ut?ut di?able ? ime ? rom ? ogic ? igh t p?z ?? n? ? ? ut?ut di?able ? ime ? rom ? ogic ? ow t p?z ?? n? ? multi-channel product only ? n?ut ?? n?ut ? n? ulation ? eakage current ? ??? ?? d 6?%? ? ??? = ?00 ?? t = ? ? 0.? n? 9 ? e?i? tance (? n?ut ?? n?ut) ? ??? ? ??? = ?00 ? ?0 ?? w 9 ca ? acitance (? n?ut ?? n?ut) c ??? ? = ? m? z ?.? ?? 9
11 figure 3. output voltage vs. forward input current. figure 4. typical diode input forward characteristic. figure 5. test circuit for t plh , t phl , t r , and t f . gnd v cc i f 5 v d.u.t. 619 ? input monitoring node pulse gen. t r = t f = 5 ns t = 100 kh z 10 % dut y cycl e c l = 15 pf the probe and jig capacitance s are included in c l . v o v e output v o monitoring node v cc r f d 1 d 2 5 k d 3 d 4 figure 2. typical logic high output current vs. temperature. figure 1. typical logic low output voltage vs. temperature.
1 figure 8. test circuit for t phz , t pzh , t plz , and t pzl . figure 9. test circuit for common mode transient immunity and typical waveforms. gnd v cc i f +5 v d.u.t. 619 ? pulse generator z o = 50 ? t r = t f = 5 ns c l c l = 15 pf including probe and jig capacitance. v o v e input v o monitoring node v cc d 1 d 2 5 k ? d 3 d 4 s2 s1 v o v ff gnd v cc v cm + pulse gen. a d.u.t. r in v o v e output v o monitoring node v cc 0.1 f bypass b - figure 6. typical propagation delay vs. temperature. figure 7. typical rise, fall time vs. temperature.
figure 12. series led drive with open collector gate (4.02 k ? resistor shunts i oh from the led). figure 13. recommended lsttl to lsttl circuit. gnd v cc d.u.t. 619 ? v cc1 (+5 v) open collector gate ttl or lsttl data input 4.02 k ? gnd v cc d.u.t. 665 ? v cc1 (+5 v) totem pole output gate ttl or lsttl data input ttl or lstt l data input 665 ? totem pole output gate 1 1 2 0.1 f data output v cc2 (+5 v) data output up to 16 lsttl loads or 4 ttl loads up to 16 lsttl loads or 4 ttl loads figure 10. lsttl to cmos interface circuit. figure 11. recommended led drive circuit. gnd v cc d.u.t. r l 665 ? v cc1 (+5 v) v cc2 (4.5 to 20 v) cmos totem pole output gate v o v e data output ttl or lsttl 2 data input 1 v cc2 5 v 10 v 15 v 20 v r l 1.1 k 2.37 k 3.83 k 5.11 k gnd v cc d.u.t. 750 ? v cc1 (+5 v) totem pole output gate ttl or lsttl data input
mil-prf-38534 class h, class k, and dscc smd test pro - gram ? vago ? echnologie ? ? i?? el ?? tocou?ler? are in com ? ? liance with m ???p ???????? cla ?? e ? ? and ? . cla ?? ? and cla ?? ? device ? are al?o in com ? liance with dscc drawing ? ?96????76? and ?96????769. ? e?ting con ?i?t? o ? ?00% ? creening and qualit ? con ? or ? mance in?? ection to m ???p????????. figure 14. single channel operating circuit for burn-in and steady state life tests. gnd v cc v e d.u.t.* *all channels tested simultaneously. conditions: i f = 8 ma v cc + 20 v v in +- i f i o = -14 ma 0.01 f t a = +125 ?c 1.90 v 100 ? i o 1200 ? for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies, limited in the united states and other countries. data subject to change. copyright ? 2006 avago technologies limited. all rights reserved. 5989-2666en - april 4, 2007

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